Ballistic to Diffusive Crossover in III–V Nanowire Transistors

In this paper, we examine the crossover between 4 ballistic and diffusive transport in III–V nanowire transistors. 5 We find that at lower drain voltages the ballistic-to-diffusive 6 crossover occurs at channel lengths of approximately 2.3 nm at 7 room temperature. However, when we increase the drain voltage, 8 we find that the ballistic-to-diffusive crossover can be more than 9 nine times as long at room temperature. As the temperature is 10 decreased, we find that the initially the performance is not signifi11 cantly improved. However, as the temperature approaches 100 K, 12 the ballistic-to-diffusive crossover increases to longer channel 13 lengths quite dramatically. When InAs, InSb, and InP nanowires 14 are compared at room temperature, we find that InAs and InSb 15 perform in a similar fashion each with ballistic regions in excess 16 of 10 nm, but that InP has no significant ballistic regime. Finally, 17 we simulate several 10-nm InAs trigate transistors and show that 18 for dopants deeply buried in the source and drain the devices 19 appear ballistic, but when dopants appear near the source-channel 20 interface, significant reductions in performance occur. 21